As integrated circuits (ICs) continue to become smaller in size and the circuitry on ICs continues to increase, the number of bonds and the density of the bonds continue to increase. During the manufacture of ICs, silicon wafers having a number of die comprising circuitry are produced according to methods that are well known in the art. A ball grid array (BGA) package is an advanced integrated circuit package comprising a substrate having contacts on the bottom for soldering the integrated circuit package to a circuit board. A BGA package can be formed two ways. A wirebond BGA comprises a die having contact pads which are connected to contact pads on the surface of the substrate by way of wirebonds. A flipchip BGA comprises a die having contact pads that are directly bonded to the substrate using solder bumps. The contact pads on the bottom of the substrate are ultimately soldered to a circuit board. Such wirebond and flipchip BGAs are well known in the art.
A critical part of BGA deployment is to have a design methodology that ensures functional correctness of the design. For a wirebond BGA, the design requires substrate artwork and a bonding diagram that match both the die and the substrate pad patterns.
Most conventional BGA design systems can support netlist driven design, where pad patterns and pin-to-pin interconnects are checked against the netlist or pinlist at all times. Conventionally, BGA designs that are generated from conventional BGA design systems are usually assumed to be correct. However, such conventional systems cannot prevent or detect (i) errors due to wrong setup of the database netlist, (ii) errors created in the artwork mask generation process, or (iii) errors created in subsequent CAD editing processes. Further, such conventional BGA design systems do not provide for a method of verification once the substrate artwork leaves the original design system.
Such conventional BGA design systems require either a complete CAD database or a textual netlist output in order to perform a design check. Furthermore, the availability of the CAD database and/or the textual netlist or pinlist output does not ensure correct verification. That is, errors in the netlist setup of the database may not be apparent to the reviewer, and the textual netlist output that is generated by the CAD system may not be an accurate representation of the actual design.
Design errors that escape early detection result in huge loss in time to market and costly retooling, which are problems for most users of conventional BGA design systems. Errors include (i) bonding errors due to missing bonds, shifted bonds, wrong bonds, (ii) incorrect substrate artwork or (iii) mismatches among a netlist, bonding diagram, and substrate artwork due to errors in one or more databases. Errors could be produced during the design stage, document editing stage, or substrate fabrication stage.
In 1999, a system existed whereby a wirebond BGA design, including substrate artwork, that was generated by Prolinx VBGA design software could be completely checked for pinlist correctness outside of the design system. That is, the substrate artwork could be verified to be correct even if the artwork is modified by other editing software. The same kind of independent pinlist check could also be performed on flipchip designs.
The system could be applied directly to verify any flipchip designs that are generated by other software platforms, including AP Designer APD from Cadence Design Systems, EPD from Cad Design Software, and Encore BGA from Avanti Corp. However, the system could not verify wirebond BGA designs that are generated from these commercial BGA design platforms. The obstacle is due to the fact that wirebond verification requires more information than just a master die and pad pinlist. Extra information that is required is either not available or not reliable.
In the field of semiconductor integrated circuit package design, it is imperative that a layout be thoroughly checked in design rules and pinlist, circuit, and functional specifications before being committed to fabrication. However, conventional BGA design systems do not verify that bonding diagrams and substrate artwork of a wirebond BGA are accurate.
Accordingly, there is a need for a method of and apparatus for verifying a bonding diagram and substrate artwork during the design and manufacture of a BGA.